8052AH-BASIC SBC
From neurotica.com
This small computer was designed to exercise and explore the capabilities of Intel's BASIC interpreter. This interpreter was originally shipped as the 8052AH-BASIC chip, which was a mask-ROM 8052AH. The 8052 is an extension of the basic 8051 (mcs51 architecture) which has additional on-chip peripherals and more RAM and ROM.
Intel eventually released the source code for the BASIC interpreter. It is some of the most dense code I have ever seen. It implements a very complete BASIC language, complete with interrupt handling, some basic I/O, a software-based EPROM programmer (for saving programs, requires some minimal hardware support), and full floating-point math support. Somehow the author, John Katausky, managed to pack all of this into 8KB of code space.
I have done quite a bit with the source code to that interpreter. With the intention of running it on 8051 implementations with larger on-chip code memory, I have "un-wound" a lot of the routines to make them more readable, fixed a few bugs, and added some new functionality. I've written some routines to control some on-chip peripherals in some of the newer 8051-architecture processors, some ANSI terminal control functions, and related stuff.
The board contains the bare-minimum support circuitry for the processor and external RAM. All it needs is basic address decoding and latching. I used a MAX232 for RS232 level conversion, and three 6264 chips for 24KB of static RAM. I built it using wire-wrap techniques on a piece of perfboard.